1. Field of the Invention
The present invention relates generally to integrated circuit manufacturing, and more specifically to cleaning processes related to the manufacture of magnetic random access memory (MRAM) structures.
2. Description of the Related Art
Phase change non-volatile memory, such as MRAM and ferroelectric random access memory (FeRAM) is emerging as memory structures of choice in developing and next generation devices. MRAM can replace today's most common types of memory such as Flash, dynamic random access memory (DRAM), and static random access memory (SRAM). The benefits of MRAM with its small memory cells include write times down to approximately 2.3 nanoseconds, or approximately 1000 times faster than the fastest Flash memory, and 20 times faster than FeRAM. Additionally, MRAM access times are realized as fast as 3 nanoseconds which is approximately 20 times faster than DRAM. Typical MRAM implementations require only 2 milliamps, and consume less than one percent of the energy of comparable DRAM.
Plasma etch is one of the fabrication processes typically used in the manufacture of MRAM structures and circuits. As is well known, plasma etch involves a plurality of process steps including photoresist (PR) deposition, photolithography, etching, and post-etch PR strip. Often, undesirable process by-product and other residues remain on the surface of the wafer after all of the plasma etch process operations are completed. Typically, a post etch cleaning process such as wet bench cleaning is used to clean a wafer after an etching process and prior to the next fabrication process.
The composition of MRAM structures present particular problems to effective post-process cleaning. Specifically, MRAM includes multiple-tunnel junction (MJT) structures which are known to form and retain non-volatile residues on sidewalls as a result of the plasma etch process. The residues may present a severe problem for the next process step, and may dramatically reduce electrical yields. Sidewall residues, therefore, need to be removed prior to the next process step. MRAM MJT structures, however, present a complex problem for traditional wet clean approaches. Exposed copper lines are susceptible to corrosion, and the MJT structure is susceptible to galvanic cell formation between different MJT metals. Peeling, poor adhesion, and diffusion of metal species into dielectric are all adverse consequences of ineffective residue removal, and most significantly, decreased electrical yields.
In view of the foregoing, what is needed is a method and process of cleaning MRAM structures post-etch processing. Post-etch cleaning of MRAM structures should effectively remove sidewall residue without damage to MRAM structures, and should prevent or minimize copper corrosion and galvanic cell formation during the cleaning process.